1. Field of the Invention
The present invention relates to the forming of a pulse width modulated generator.
2. Description of the Related Art
Pulse width modulated signals are used in many applications, for example to switch a control switch of a DC/DC voltage converter of voltage step-down or step-up type.
FIG. 1 illustrates such a step-up converter (CONV) 1 intended to provide, for a DC supply voltage Valim, a greater DC voltage Vout to a load. As an example, a load across which voltage Vout is regulated from a set value depending on a reference voltage Vref is considered. For example, the load is formed of light-emitting diodes of a backlighted screen of a mobile phone.
Converter 1 comprises, in series between a high supply rail at voltage Valim and a reference rail or ground GND, an inductance 2, a diode 3, and a capacitor 4. Intermediary diode 3 is directed to enable flowing of a current from inductance 2 to capacitor 4. The junction point of the cathode of diode 3 and of an armature of capacitor 4 forms an output terminal of converter 1 connected to an end of the load. Another end of the load is connected to reference rail GND by a read resistor 5 which belongs to the converter.
To regulate voltage Vout, the junction point of the load and of resistor 5 is connected to an inverting input (−) 6 of an operational amplifier 7 having a non-inverting input (+) 8 receiving DC voltage reference Vref. Output error signal ERR of amplifier 7 is provided to a reference input 10 of a pulse generator (GEN) 11. Resistor 5 is used as a current-to-voltage converter.
Generator 11 provides a pulse width modulated signal PWM to a control terminal of a controllable switch 12, connected between the anode of diode 3 and reference rail GND. Generally, switch 12 is a MOS transistor, the control terminal of which is its gate G.
Generator 11 typically comprises an oscillator (OSC) 13 comprising two distinct outputs 14 and 15. An output 14 of oscillator 13 provides a sawtooth signal SLOPE to the non-inverting input (+) 16 of a comparator 17. An inverting input (−) 18 of comparator 17 is connected to terminal 10 and thus receives error signal ERR provided by amplifier 7. The other output terminal 15 of oscillator 13 provides a pulse train PULSE, of frequency equal to the sawtooth frequency SLOPE, to a set input S of an RS-type electronic flip-flop 19. A reset input R of flip-flop 19 is connected to output 20 of comparator 17. Output Q of flip-flop 19 forms the output of generator 11 and provides the PWM signal to gate G.
Generator 11 thus provides a pulse width modulated signal PWM, the modulation reference ERR of which depends on the state of the voltage difference across resistor 5 of converter 1 with respect to a reference Vref. In practice, pulse width modulated signal PWM is provided on output 20 of comparator 17 and locked by flip-flop 19 to obtain an appropriate control of transistor 12.
FIGS. 2A and 2B are partial simplified timing diagrams illustrating signals SLOPE, ERR, and PWM of FIG. 1. FIG. 2A illustrates an example of the variation of signals SLOPE and ERR along time t. FIG. 2B illustrates signal PWM on output 20 resulting from the comparison of signal ERR and SLOPE of FIG. 2A. As illustrated in FIG. 2B, pulse PWM appears at the zero crossing of signal SLOPE and disappears when this signal becomes equal to signal ERR.
A disadvantage of this type of circuit is the inaccuracy of the duty cycle of signal PWM. Indeed, oscillator 13 does not provide a perfect sawtooth signal such as signal SLOPE of FIG. 2A. A real oscillator provides a signal, illustrated in dotted lines in FIG. 2A, which exhibits an offset, generally a delay, at the zero crossing. Then, as also illustrated in dotted lines in FIG. 2B, the time at which signal SLOPE becomes really equal to reference signal ERR is also offset by an absolute error existing on the entire increasing linear ramp portion of the signal. For relatively high values of the duty cycle of signal PWM, such an error is negligible. However, for small values of the duty cycle, this absolute error causes a significant increase in the duty cycle of signal PWM.
Another disadvantage is that this error is of an unknown value, uncontrollable especially since it depends on uncontrollable drifts of the manufacturing processes and since it may vary during the generator operation.
Another disadvantage of this circuit is the fact that the uncertainty about the real value of the duty cycle is further increased by the switching delays of the various circuit comparators (7, 17). Such delays are all the greater as the compared values are small (close to the level of reference rail GND). The increase is then relatively greater for small duty cycles than for relatively large duty cycles.
Such a duty cycle of increased value with respect to a necessary or desired value for a load is particularly disadvantageous in the case of portable devices supplied by a battery. Indeed, since the duty cycle corresponds to the power consumed by the battery, if it is increased, the battery discharges faster than it should.